The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable...

The x86 instruction set has several times been extended with SIMD (Single instruction, multiple data) instruction set extensions. These extensions, starting...

INT is an assembly language instruction for x86 processors that generates a software interrupt. It takes the interrupt number formatted as a byte value...

Instructions that have at some point been present as documented instructions in one or more x86 processors, but where the processor series containing...

pointer to another register. Assembly language X86 instruction listings X86 architecture CPU design List of assemblers Self-modifying code DOS DOS API...

Instruction set extensions that have been added to the x86 instruction set in order to support hardware virtualization. These extensions provide instructions...

Instructions that have been added to the x86 instruction set in order to assist efficient calculation of cryptographic primitives, such as e.g. AES encryption...

x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed...

important part of instruction encoding for the x86 instruction set. Opcodes in x86 are generally one-byte, though two-byte instructions and prefixes exist...

x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first announced in 1999. It introduced two new...

field Control register CPU flag (x86) Program status word Status register x86 assembly language x86 instruction listings Intel 64 and IA-32 Architectures...

vector generalized linear model CQO, an 64-bit x86 instruction; see x86_instruction_listings#Added_with_x86-64 This disambiguation page lists articles associated...

x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved...

tautology xyzzy (computing) – a command sometimes used instead of NOP X86 instruction listings#Added in P5/P6-class processors - NOPL, the official long NOP "Motorola...

extension) for JPEG images JPE (assembly language) instruction for jump if parity even, see x86 instruction listings Joint Planning Environment of the U.S. Joint...

Operations) instruction set, announced by AMD on May 1, 2009, is an extension to the 128-bit SSE core instructions in the x86 and AMD64 instruction set for...

X86 Assembly/AVX, AVX2, FMA3, FMA4 The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor...

In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from CPU Identification)...

XMM vector register. SIMD SSE3 Intel Core 2 Tejas and Jayhawk x86 instruction listings "2.9.5". Intel 64 and IA-32 Architectures Optimization Reference...

removed in newer AMD processors using the Zen microarchitecture. x86 instruction listings Fused multiply–add Hruska, Joel (November 14, 2008). "AMD Fusion...

their importance to core CPU functionality. x86 instruction listings CPUID Processor Supplementary Instructions For The i686[permanent dead link] http://markhobley...

operator in some programming languages Logical shift right in x86 instruction listings Self-healing ring SHR (operating system) for smartphones Scottish...

x86, it might produce the following assembly code (Intel syntax): caller: ; make new call frame ; (some compilers may produce an 'enter' instruction instead)...

extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and...

resources. C++ and assembly. Windows, Linux, BSD, Mac OS X". Agner Fog. "x86, x64 Instruction Latency, Memory Latency and CPUID dumps". instlatx64.atw.hu. See...

operates as follows: when a program issues an x86 I/O port instruction such as IN or OUT (see x86 instruction listings - and note that there are byte-, word-...

MOVDDUP MOVHLPS MOVHPS/MOVHPD MOVLHPS MOVLPS/MOVLPD MOVMSKPS/MOVMSKPD MOVNTPS MOVSHDUP MOVSLDUP MOVSS/MOVSD MOVUPS/MOVUPD x86 instruction listings v t e...

Crusoe is a family of x86-compatible microprocessors developed by Transmeta and introduced in 2000. Instead of the instruction set architecture being...

MOVAPS/MOVAPD MOVHLPS MOVHPS/MOVHPD MOVLHPS MOVLPS/MOVLPD MOVMSKPS/MOVMSKPD MOVNTPS MOVSHDUP MOVSLDUP MOVSS/MOVSD MOVUPS/MOVUPD x86 instruction listings...

The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting...