David H. D. Warren

David H. D. Warren
Alma materUniversity of Edinburgh
Known forWarren Abstract Machine
Scientific career
InstitutionsSRI International
Quintus Computer Systems
University of Bristol
ThesisApplied Logic - Its Use and Implementation as Programming Tool (1977)
Doctoral advisorDonald Michie
Robert Kowalski

David H. D. Warren is a computer scientist who worked primarily on logic programming and in particular the programming language Prolog in the 1970s and 1980s. Warren wrote the first compiler for Prolog, and the Warren Abstract Machine execution environment for Prolog is named after him.

Early life and education

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Warren received a Ph.D.[1] in artificial intelligence from the University of Edinburgh in 1977 under advisor Robert Kowalski, and (a second advisor) Donald Michie.[2]

Career

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Warren worked for the Artificial Intelligence Center at SRI International in the 1980s.[3][4]

He founded the company Quintus Computer Systems in 1983 with William Kornfeld, Lawrence Byrd, Fernando Pereira and Cuthbert Hurd to commercialize the Prolog compiler, Quintus Prolog.[5] Quintus was sold to Intergraph Corporation in 1989.[6]

He has also held an academic position at the University of Bristol Department of Computer Science.[7]

References

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  1. ^ Warren, David H. D. (1978). Applied logic : its use and implementation as a programming tool (PhD thesis). hdl:1842/6648.
  2. ^ David H. D. Warren at the Mathematics Genealogy Project -- (accessed 10 August 2014)
  3. ^ "David H.D. Warren". Alumnus of the Artificial Intelligence Center. Artificial Intelligence Center. Retrieved 26 May 2010.
  4. ^ Nils J. Nilsson (1984). "Introduction to the COMTEX Microfiche Edition of the SRI Artificial Intelligence Center Technical Notes". AI Magazine. Vol. 5, no. 1. p. 49.
  5. ^ The Artificial intelligence report. Artificial Intelligence Publications. 1983.
  6. ^ David E. Weisberg (2008). "Intergraph" (PDF). The Engineering Design Revolution:The People, Companies and Computer Systems That Changed Forever the Practice of Engineering. Archived from the original (PDF) on 7 July 2010. Retrieved 26 May 2010.
  7. ^ Raina, S.; Warren, D.H.D. (1992). "Traffic patterns in a scalable multiprocessor through transputer emulation". Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences. IEEE. pp. 267–276 vol.1. doi:10.1109/HICSS.1992.183173. ISBN 0-8186-2420-5. S2CID 62278813.